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3.8.1 Half Adder
The half adder is a combinational circuit that is designed to perform the
addition of two bits and produce the two binary outputs as sum (S) and
carry (C) bits.
Let us revise the rules of binary addition of two bits covered in the first
chapter of this book to draw the truth table of the half adder. A and B
denote two bits each, then sum and will be as given in the following table.
Input Output
A B Sum Carry
0 0 0 0
0 1 1 0
1 0 1 0
1 1 0 1
We can thus derive the Boolean expression of the sum and carry terms as:
Sum term = A'.B + A.B' which is the Boolean expression of two variables XOR gate.
Carry term = A.B which can be represented using AND gate.
The logic circuit diagram of the half adder is shown below.
A Sum = A⊕B
B
Carry = A.B
3.8.2 Full Adder
The full adder is a combinational circuit that is designed to perform the
addition of three bits and produce the two binary outputs as sum (S) and
carry (C) bits.
Out of the three bits, two are standard input bits and the third one is the
carry from the previous column called the carry bit in input as carry-in
(C ). Out of two output bits, the resultant output is the sum bit and the
in
output carry bit is called carry-out (C ).
out
The truth table of a full adder is the same as a binary addition of three bits.
Input Output
A B C Sum C
in out
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1
8686 Touchpad Computer Science-XI

