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A           B         (A.B)'          A        B        C      (A.B.C)'
                                 0           0           1             0        0        0         1
                                 0           1           1             0        0        1         1
                                 1           0           1             0        1        0         1
                                 1           1           0             0        1        1         1
                            Truth table of two variables NAND gate     1        0        0         1
                                                                       1        0        1         1
                                                                       1        1        0         1
                                                                       1        1        1         0

                                                                     Truth table of three variables NAND gate

              The NAND gate can be demonstrated with the following logic circuit using AND and NOT gate.


                                               A                 A.B             (A.B)'

                                               B


              The NAND gate is a universal gate as it can be used to represent the fundamental gates AND, OR, and NOT.

              Representing NOT gate using NAND gate only:
              When a single Boolean variable passes through the NAND gate it gets complemented as shown in the circuit below:


                                                                            Output across NAND gate
                                                A                  A'       = (A.A)'
                                                A
                                                                            = A'   [Idempotent Law]

              Representing AND gate using NAND gate only:
              Two NAND in series are equivalent to AND gate as shown in the logic circuit diagram given below.


                                                                           Output across NAND gate 1 = (A.B)'
                         A                  (A.B)'                A.B
                                    1                    2                 Output of NAND gate 2 = ((A.B)')'
                         B                                                 = A.B   [Involution law]


              Representing OR gate using NAND gate only:

              OR operation is achieved by passing complemented input through the NAND gate as shown in the logic circuit diagram
              given below.

                         A
                                    1                                      Output of NAND gate 1 = A'
                         A                       A'                        Output of NAND gate 2 = B'
                                                                 (A+B)
                                                         3                 Output of NAND gate 3
                                                 B'                        = (A'.B')'
                                                                           = A"+B"  [De Morgan’s Law]
                         B
                                    2                                      = A+B   [Involution Law]
                         B



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