Page 80 - ComputerScience_Class_11

Representing OR gate using NAND gate only:
The OR operation is achieved by passing complemented input through the NAND gate as shown in the logic circuit
diagram given below:

A
1 Output of NAND gate 1 = A'
A A' Output of NAND gate 2 = B'
(A+B)
3 Output of NAND gate 3
B' = (A'.B')'
= A"+B" [De Morgan’s Law]
B
2 = A+B [Involution Law]
B

3.7.5 NOR Gate
The NOR gate is the complement of the OR gate. It produces high output (1) only when all the inputs are low (0). In all
other cases, low output (0) is produced.

The symbol and truth table of the NOR gate are shown below:

A (A+B)' A (A+B+C)'
B
B C
Symbol of NOR gate Symbol

Truth table of a two-variable NOR gate Truth table of a three-variable NOR gate

A B (A+B)' A B C (A+B+C)'
0 0 1 0 0 0 1
0 1 0 0 0 1 0
1 0 0 0 1 0 0
1 1 0 0 1 1 0
1 0 0 0
1 0 1 0
1 1 0 0
1 1 1 0

The NOR gate can be demonstrated with the following logic circuit using OR and NOT gate.

A (A+B) (A+B)'
B

The NOR gate is a universal gate as it can be used to represent the fundamental gates AND or and NOT.
Representing NOT gate using NOR gate only:
When a single Boolean variable passes through the NOR gate, it gets complemented as shown in the circuit given
below:

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