Page 93 - Computer science 868 Class 12
P. 93

Previous Years' Questions


                    1. Draw the logic gate diagram for the reduced expression. Assume that the variables and their complements are available as
                      inputs.                                                                                    [ISC 2023]
                   Ans.  Logic gate diagram for F(A, B, C, D) = (A + C) . (A’ + C’) . (B + D)
                       A


                       C
                       A'
                                                           F(A,B,C,D)

                       C'
                       B


                         D'
                    2. Draw the logic gate diagram for the reduced expression. Assume that the variables and their complements are available as
                      inputs.                                                                                    [ISC 2023]
                   Ans.  Logic gate diagram for F(A, B, C, D) = A’C + BC + AD’
                       A'
                       C

                       B                                  F(A,B,C,D)

                       C

                       A

                      D'

                    3. Differentiate between half adder and full adder. Write the Boolean expression and draw the logic circuit diagram for the SUM
                      and CARRY of a full adder.                                                                 [ISC 2023]
                   Ans.                    Half Adder                                       Full Adder
                       The half adder is a combinational circuit that is designed to   The full adder is a combinational circuit that is designed
                       perform the addition of two bits and produce the two binary   to perform the addition of three bits and produce the two
                       outputs as sum (S) and carry (C) bits.            binary outputs as sum (S) and carry (C) bits.
                        Boolean expression of Sum term = A'.B'.C + A'.B.C' + A.B'.C' + A.B.C = A ⊕ B ⊕ C
                        Boolean expression for carry term = A'.B.C + A.B'.C + A.B.C' + A.B.C = A.B + B.C + C.A
                        The logic circuit diagram of a full adder circuit is:

                       A                    Sum = A⊕B⊕C
                       B                               in
                       C in

                                              A.B


                                                              A.B+B.C +C .A
                                                                    in
                                                                       in
                                              B.C in



                                             C .A
                                              in


                                                                                                                        91
                                                                                                   Computer Hardware    91
   88   89   90   91   92   93   94   95   96   97   98