Page 81 - Computer science 868 Class 12
P. 81

D  = A '.A '.A .A '    is 0
                         2
                  2
                              0
                            1
                      3
                 D  = A'.A '.A .A     is 0
                      3
                              0
                  3
                         2
                           1
                 D  = A '.A .A '.A'    is 0
                         2
                           1
                               0
                      3
                  4
                 D  = A '.A .A '.A    is 0
                  5
                         2
                           1
                              0
                      3
                 D  = A '.A .A .A '   is 0
                  6
                         2
                              0
                      3
                            1
                 D  = A '.A .A .A     is 0
                      3
                            1
                         2
                              0
                  7
                 D  = A .A '.A '.A '   is 0
                              0
                            1
                         2
                      3
                  8
                 D  = A .A '.A '.A     is 1
                         2
                              0
                            1
                      3
                  9
                 We conclude output is 1 only across AND gate D  which represents decimal 9.
                                                           9
                 Applications of Decoder circuit
                 1.  It is used in the conversion of Binary number to its Octal, Decimal and Hexadecimal form
                 2.  It is used in sequencing signal and timing signal applications
                 3.  It is used in network lines
                 Drawbacks of Decoder
                 If the inputs are not connected then the output will not be 0.
                 Encoder vs Decoder
                                          Encoder                                        Decoder
                       It converts Octal, Decimal and Hexadecimal to Binary  It is used in the conversion of Binary number to its Octal,
                                                                      Decimal and Hexadecimal from
                                     n
                                                                                                  n
                       It has maximum 2  input lines and n output lines  It has n input lines and maximum 2  output lines
                       Circuit contains OR gate                       AND and NOT gate used in circuit
                     2.6 MULTIPLEXER
                 We have learnt about devices Encoder and Decoder which convert data form one from to another. Now, we will know
                 how the computer performs selective processing with help of a circuit named a multiplexer.
                 A Multiplexer is a modified Decoder circuit with additional selection lines and an OR gate. A multiplexer produces one
                 output from many inputs.
                            Multiplexer is a combinational circuit which selects a single output from a set of inputs.
                                             n
                            A multiplexer has 2  input lines and one output line, where n is the number of selection lines.
                 A Multiplexer also known as MUX can be of the following types:
                 1.  4 × 1 Multiplexer
                 2.  8 × 1 Multiplexer
                 3.  16 × 1 Multiplexer
                 2.6.1  4 × 1 Multiplexer
                 A 4x1 Multiplexer has four  inputs denoted as A , A , A , and A  and two  selection lines namely S , S  and single output
                                                                       3
                                                                                                      0
                                                                                                        1
                                                          0
                                                             1
                                                                2
                 Y. On the basis of the input combination, only one AND gate will generate output high(1) and is selected while others
                 have output low(0).


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