Page 101 - Computer science 868 Class 12
P. 101

33.  State the application of a Half Adder. Draw the truth table and circuit diagram for a Half Adder.   [ISC 2017]
                   Ans.  The half adder is a combinational circuit that is designed to perform the addition of two bits and produce the two binary outputs
                       as sum (S) and carry (C) bits.
                                                               Truth Table
                               Input              Output
                           A         B        Sum       Carry
                           0         0          0         0
                           0         1          1         0
                           1         0          1         0
                           1         1          0         1
                        We can thus derive the Boolean expression of the sum and carry term as: Sum term = A'.B + A.B' which is the Boolean expression
                       of two variable XOR gate. Carry term = A.B which can be represented using AND gate. The logic circuit diagram of the half adder
                       is shown below:

                       A                    Sum = A⊕B
                       B


                                            Carry = A.B




                   34.  What is & Multiplexer? How is it different from a decoder? Draw the circuit diagram for a 8 : 1 Multiplexer.    [ISC 2017]
                   Ans.  Multiplexer is a combinational circuit which selects a single output from a set of inputs. A multiplexer has 2n input lines and one
                       output line, where n is the number of selection lines.
                        Decoder is a combinational circuit that converts any binary number to its equivalent Octal, Decimal or Hexadecimal form. It has
                       ‘n’ input lines and maximum 2n output lines
                       The logic circuit diagram of a 8 x 1 MUX is given below:



                                                                A 0


                                                                A 1


                                                                A 2


                                                                A 3


                                                                A
                                                                 4
                                                                                                                       Y
                                                                A 5


                                                                A 6


                                                                A 7







                                                                      S 2    S 1     S 0


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