Page 98 - Computer science 868 Class 12
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21. Write the canonical POS expression of: F(P, Q) = Π(0, 2) [ISC 2019]
Ans. (A + B).(A' + B)
22. Find the dual of: X.Y+X.Y' = X + 0 [ISC 2019]
Ans. (X + Y).(X + Y') = X.1
23. If F(A, B, C) = A'.B'.C' + A'.B.C' then find F' using De Morgan's Law. [ISC 2019]
Ans. (AB'C + ABC') ( x' + y' = x'.y')
= (AB'C')'. (A'.B.C')' ( (x'.y') = x' + y')
= ((A'B')' + (C)'. ((A'B)' + (C')')
= ((A')' + (B')') + C).((A')' + (B)' + C)
= (A + B + C).(A + B' + C)
= AA + AB' + AC + BA + BB' + BC + CA + CB' + CC ( x.x = x)
= A + AB' + C + AC + AB + B'C + BC
24. If A = “It is cloudy” and B = “It is raining”, then write the proposition for [ISC 2019]
(i) Contrapositive
(ii) Converse
Ans. (i) If it is not raining then it is not cloudy.
(ii) If it is raining then it is cloudy.
25. Draw the logic gate diagram for the reduced expression using only NAND gates. Assume that the variables and their
complements are available as inputs. [ISC 2019]
Ans. B'
B'D'
D'
B
BC' B'D'+BC'+B'C
C'
B'
B'C
C
26. Draw the logic gate diagram for the reduced expression using only NOR gates. Assume that the variables and their complements
are available as inputs. [ISC 2019]
Ans. P
Q P+Q+S
S
Q
Q+R F
R
P'
P'+S'
S'
27. How is a decoder different from a multiplexer? Write the truth table and draw the logic circuit diagram for a 3 to 8 decoder and
explain its working. [ISC 2019]
Ans. Decoder is a combinational circuit that converts any binary number to its equivalent Octal, Decimal or Hexadecimal form. It has
‘n’ input lines and maximum 2n output lines.
Multiplexer is a combinational circuit which selects a single output from a set of inputs. A multiplexer has 2n input lines and one
output line, where n is the number of selection lines.
9696 Touchpad Computer Science-XII

