Page 86 - Computer science 868 Class 12
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4.  NAND and NOR are called ………………… gates.
                  5.  ………………… is a unary gate.
                  6.  The sum term of a Half adder is equal to a two-variable ………………… gate.

                  7.  Encoder converts any Octal , Decimal or Hexadecimal number to its  ………………… form.
                  8.  Multiplexer is called a data ………………… .
                  9.  ………………… converts binary number to its Octal, Decimal or Hexadecimal form.
                 10.  A MUX has 2n selection lines , n input lines and  ………………… output lines.

                 Answers
                 1. (A.B)'            2. XNOR                3. 2                4. universal             5. NOT
                 6. XOR               7. Binary              8. selector         9 Decoder              10. 1

              C.  Answer the following questions:
                  1.  Draw the logic circuit diagram of the following Boolean expression using AND, OR gates. Assume complement is available as
                    input.
                     (i)  (B'+D).(A'+D').(B+C'+D')               (ii)  (B'.C'+A.C)'
                Ans.  (i)                                             (ii)
                       B'             (B'+D)                             B'               B'.C'
                       D                                                 C'                               (B'.C' + A.C)'

                                                        (B'+D).(A'+D').
                       A'             (A'+D')             (B+C'+D')
                                                                         A
                       D'
                                                                         C                A.C

                       B
                       C'
                       D'             (B+C'+D')

                  2.  Draw a logic circuit diagram to represent AND, OR and NOT gates using NOR gate only.
                Ans.  (i)  NOT gate using NOR gate

                                              A                (A+A)'                A'
                                              A

                    (ii)  OR gate using NOR gate

                                             A                (A+B)'                (A+B)

                                             B
                    (iii)  AND gate using NOR gate


                                           A                     A'
                                           A
                                                                                       A.B


                                           B                     B'
                                           B






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