Page 94 - Computer science 868 Class 12
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4. (I)   What is an encoder? How is it different from a decoder? Draw the logic circuit for a 4 : 1 multiplexer and explain its
                       working.                                                                                [ISC 2023]
                Ans.  An Encoder is a combinational circuit that convert decimal, octal or   S  S
                    hexadecimal numbers to its equivalent binary from.        1        0
                      Decoder is a combinational circuit that converts any binary number
                    to its equivalent Octal, Decimal or Hexadecimal form. It has ‘n’ input
                    lines and maximum 2  output lines.
                                     n
                      To draw the logic circuit of a 4 × 1 Multiplexer we have to first draw
                    the circuit of a 2 × 4 Decoder. Add four input lines with each of the  A' 0
                    AND gates. Now, pass the outputs of the four AND gates to a single
                    OR gate. The circuit will be as shown here.
                    Working Principle of 4 × 1 Multiplexer                A' 1
                     From the truth table, the Boolean expression for output Y can be
                    written as:
                     Y = S '.S '.A  +  S 'S .A  + S .S '.A  + S .S .A 3   A
                             0
                          0
                                 1 0
                                                1
                                                  0
                        1
                                             2
                                     1
                                        1
                                          0
                     Say the state of selection switch S  = 1 and S0 = 0 then output Y will be:  2
                                             1
                     Y = 0.1.A  +  0.0.A  + 1.1.A  + 1.0.A 3
                                  1
                           0
                                        2
                     Or  Y = 0 + 0 + A  + 0                               A
                                2
                     From the high signal produced in the OR gate, it is evident that A  is   3
                                                                      2
                    selected in this example.
                    (ii)    From the logic diagram given below, write  the Boolean
                       expression for (1) and (2). Also, derive the Boolean expression (F) and simplify it.    [ISC 2023]
                         x                (1)
                         y
                                                           F
                                          (2)
                         z

                Ans.  Gate (1) = (x. y)'
                     Gate (2) = (y + z)'
                     F(x, y, z) = (x. y)' + (y + z)'
                  5. A decoder is a combinational circuit which:                                               [ISC 2022]
                              n
                    (a)  inputs 2  lines and outputs ‘n’ lines           (b)  converts parallel data into serial data
                    (c)  inputs ‘n’ lines and outputs 2  lines           (d)  adds more than two binary bits
                                              n
                Ans.  (c)
                  6. When three NANO gates are placed in series, it performs:                                  [ISC 2022]
                    (a)  NAND operation                                  (b)  AND operation
                    (c)  OR operation                                    (d)  NOR operation
                Ans.  (a)
                  7. The expression for Sum of a Full adder is:                                                [ISC 2022]
                    (a)  (a+b').(b+c').(a+c')                            (b)  a ⊕ b ⊕ c
                    (c)  a'b + ab' + a'c                                 (d)  a ⊕ b
                Ans.  (b)
                  8. Multiplexers are combinational circuits which are used for:                               [ISC 2022]
                    (a)  converting High Level signals into Low Level signals   (b)  data transmission
                    (c)  converting binary to decimal                    (d)  adding binary bits
                Ans.  (b)
                  9. The carry expression in cardinal form for a half adder is:                                [ISC 2022]
                    (a)  Π(0,1,2)                                        (b)  Σ(0,1,2)
                    (c)  Π(3)                                            (d)  Σ(1,2)
                Ans.  (a)


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