Page 79 - Computer science 868 Class 12
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0       1       0       0       0       1       0       0        0       0       0
                            0       1       1       0       0       0       1       0        0       0       0
                            1       0       0       0       0       0       0       1        0       0       0
                            1       0       1       0       0       0       0       0        1       0       0
                            1       1       0       0       0       0       0       0        0       1       0
                            1       1       1       0       0       0       0       0        0       0       1

                 From the truth table we can see that:
                 D  = A '.A '.A '
                            0
                      2
                  0
                         1
                 D  = A '.A '.A 0
                         1
                      2
                  1
                 D  = A '.A .A '                                                       A 2    A 1    A 0
                      2
                           0
                  2
                         1
                 D  = A '.A .A 0
                  3
                         1
                      2
                 D  = A .A '.A ' 0
                         1
                  4
                      2
                 D  = A .A '.A 0                                                                                      D 0
                  5
                         1
                      2
                 D  = A .A .A '                                                                                       D 1
                           0
                      2
                         1
                  6
                 D  = A .A .A 0
                      2
                         1
                  7
                 To  draw the logic  circuit  diagram of  a 3 to  8 decoder, all  three  input                        D 2
                 variables  are connected both   directly  and  through  the NOT gate  to get
                 the complemented input. The input variables are connected to eight AND                               D 3
                 gates. Only one AND gate produces High output(1) for a particular input
                 combination  and  represents the corresponding  Octal  number, while  the                            D 4
                 other AND gates are 0.
                 The logic circuit diagram is as shown.                                                               D 5
                 Working Principle of Binary to Octal Decoder:
                                                                                                                      D
                 If  we take A  = 1  A  = 1 and A  = 0 as input the output across the eight gates                      6
                                 1
                           2
                                           0
                 is as follows:                                                                                       D 7
                 D  = A '.A '.A '     i.e.,  0.0.1 = 0
                         1
                  0
                      2
                            0
                 D  = A '.A '.A       i.e.,   0.0.0 = 0
                            0
                  1
                         1
                      2
                 D  = A '.A .A '      i.e.,  0.1.1 = 0
                         1
                      2
                            0
                  2
                 D  = A '.A .A        i.e.,   0.1.0 = 0
                            0
                      2
                         1
                  3
                 D  = A .A '.A '      i.e.,   1.0.1 = 0
                         1
                      2
                            0
                  4
                 D  = A .A '.A        i.e.,   1.0.0 = 0
                            0
                         1
                      2
                  5
                 D  = A .A .A '       i.e.,   1.1.1 = 1
                         1
                           0
                      2
                  6
                 D  = A .A .A         i.e.,   1.1.0 = 0
                      2
                           0
                  7
                         1
                 We conclude output is 1 only across AND gate D  which represents octal value 6.
                                                           6
                 2.5.2 Binary to Decimal Decoder
                 A Decimal number is represented using four bits. A Binary to Decimal Decoder has four input lines and 10 output lines
                 to represent digits from 0 to 9.
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